» Digital design: M.Tech Latest Jobs Openings in Companies in India
Name: sivaraj
Objective : Seeking an opportunity where my knowledge can be developed and utilized in a more efficient manner.
Education :
M.Tech, VLSI DESIGN (7.44 CGPA), 2007
SRM Institute of Science and Technology, Chennai
B.E, Electrical Engineering (57%), 2003
Regional Engineering College, Durgapur , West Bengal
Higher Secondary (88%), 1999
ST.Paul’s MHSS, Neyveli
Matriculation (77%), 1997
ST.Paul’s MHSS, Neyveli
Special Interest : Digital design ,CMOS VLSI Design, ASIC
Hardware descriptive Languages : VERILOG ,VHDL,PSPICE
Simulation tool : Model Sim
Synthesis tool : Xilinx
Project-I
Title : Design of Digital FIR Filter using Distributed Arithmetic Algorithm and Residue number system
Summary : This project work presents a method for implementing high speed Finite Impulse Response (FIR) filters using just adders, Look Up Tables (LUTs) and shifters. The use of a Distributed Arithmetic (DA) algorithm eliminates the multiplier unit which requires more number of adders. The RNS implementations show that for high-order FIR filters the gives the same throughput as filters implemented in the conventional methods, but have smaller area and power consumption.
Project-II
Project Centre : ACCEL IT ACADEMY, Chennai
Title : Synthesis of “AMBA” Advanced High Performance Bus-master
Summary : The Advanced Micro controller Bus Architecture (AMBA)-AHB is for high performance, high clock frequency system modules. The AHB acts as the high performance system backbone bus which supports the efficient connection of processors and off-chip external memory interfaces.
SOFTWARE SKILLS:
• WINDOWS 95
• C/C++
• Client Server Technologies:
Front End : Visual Basic 6.0 Back End: Oracle 7,SQL,PL/SQL
Certification:
• Diploma in Computer Programming (1998)
• Computer Hardware Maintenance and Troubleshooting (2003)
Other skills:
• Basics of Networking (I-Module CCNA)
• WINDOWS SERVER2000
Experience:
• Computer Hardware Service Engineer, Service Point, Neyveli
• Sales Advisor, System Admin, Vasavi BAJAJ, Neyveli
Extracurricular:
• College Volley Tournament-Winners, REC,Durgapur
• Participated in College Cricket Tournament
Hobbies:
• Painting, Poetry, listening music
Personal profile:
NAME : G.Sivaraj
Date Of Birth : 14-07-1981
Sex : Male
Marital Status : single
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Location: Delhi, Gurgaon
Job Title: Lead Digital/FPGA Engineer
Company: Ciena
Job Description: Responsible for communication and coordination with Software, Hardware, Integration and Test, System Engineering, Validation, and Manufacturing teams Through out the design and development cycle.
Experience: 5 -12 Yrs,
MI Job Id: 2233810
Electronic Board Design
• Design and development of high speed digital boards / systems based on teiecom and networking technologies using specialty ASICs e.g. Framers / Mappers / MACs / Network Processors etc., high performance microcontrollers e.g. Motorola Power PC/QUICC, high speed memories e.g. DDR-1/2, RLDRAM-II, and high density Xilinx / Altera FPGAs etc.
• Hands-on experience using test equipment e.g. Oscilloscopes, Logic Analyzers, Smartbits, Omniber, etc for design verification
Hardware (7+ years of experience) FPGA Development
Design and development of high density complex FPGAs, or ASiC Front end, for telecom and networking technologies. Strong skills in digital logic design, with RTL coding and verification using VHDL and/or Veriiog
Knowledge of Xilinx/ Altera FPGA device architecture. Design Flow using Simplicity and Modelsim is a plus
PCB Design
• In-depth knowledge and experience of PCB designs incorporating High Speed Digital, Analog and RF circuitry. Matched Length and controlled impedance, differential pairs, fine pitch parts including BGA's on 12-28 layer boards, including library creation
• Experience in EDA tools including Cadence Allegro, PADS Power PCB and CAM350
BPL TELECOM PRIVATE LIMITED
BPL Telecom Private Limited is a part of the BPL Group, and provides cutting-edge solutions, services and products in the broader areas of Enterprise Communications, Digital Consumer Electronics and Information Technology, with a dedicated focus towards hardware and software solutions for highly competitive global markets.
Technology Services Group
Job Code RSDE
Design Engineer
Qualification: BE/Btech/ME/Mtech-CSE/ECE
Experience: 2-3 years .
Skill Set: C/C++
Specifications :
2-3 years of experience in telecom domain, thorough with TCP/IP Internals Experience in IPSEC or NAT or VLAN or WLAN or SCTP is an advantage Experience in Vxworks platform and knowledge in BSP is an advantage.
Job Code: RSJT
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Name: Anurag Goswami
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1+ years of experience with analysis, design, development and implementation of Software Applications using Adobe / Microsoft technologies in India, offshore development arm of Software Company
Good skills in development of Web service, Web applications.
1+ years of experience in Microsoft .NET Framework 2.0, C#, ASP.Net, Visual Studio 2005, SQL Server 2005.
Experience in developing application using Adobe FLEX Builder 2.0 ,ActionScript 3.0
Successfully developed project using VC++.NET (managed / unmanaged / marshalling ) to embed and extract XMP data from digital assets using Adobe XMP SDK 4.1
Successfully deployed enterprise content management tool IBM WPC .
Excellent teamwork and management
